Udemy - Complete training Comprehensive Digital Logic Design Course

Files Included :

1 Introduction to the Course.mp4 (198.41 MB)
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2 Intro to Number System.mp4 (241.86 MB)
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1 Counters.mp4 (242.17 MB)
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2 Ripple Counters.mp4 (199.95 MB)
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3 Synchronous Counters.mp4 (170.68 MB)
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1 Memory Basics.mp4 (203.37 MB)
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2 Arrays of RAM ICs.mp4 (181.16 MB)
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1 Decimal and Alphanumeric Codes.mp4 (149.6 MB)
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2 Logic Gates and Boolean Algebra.mp4 (138.89 MB)
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1 Standard Forms.mp4 (150.76 MB)
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2 K-Maps.mp4 (178.02 MB)
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3 Map Manipulation.mp4 (192.29 MB)
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1 XoR, Gate Prop Delay and Combinational Design.mp4 (154.95 MB)
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1 Verilog HDL #01.mp4 (144.53 MB)
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2 Verilog HDL #02.mp4 (186.27 MB)
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1 Flips-Flops.mp4 (296.23 MB)
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2 Latches Flip Flops.mp4 (190.28 MB)
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3 Flip-Flop Timing and Sequential Circuit Analysis.mp4 (304.99 MB)
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1 Hierarchical Design and Technology Mapping.mp4 (148.07 MB)
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2 Rudimentary Logic Functions and Decoders.mp4 (180.7 MB)
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3 Encoders.mp4 (133.76 MB)
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4 Multiplexers.mp4 (157.77 MB)
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1 Sequential Circuit Design.mp4 (244.44 MB)
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2 Designing with JK Flip Flops.mp4 (192.91 MB)
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3 Programmable Logic Devices.mp4 (185.89 MB)
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4 Sequential Circuits Latches.mp4 (206.29 MB)
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1 Registers and Shift Registers.mp4 (225.64 MB)
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2 Shift register(parallel load) & Bidirectional Shift register & Register Transfer.mp4 (163.72 MB)
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3 Register Transfer Operations & Micro Operations.mp4 (228.5 MB)
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