Udemy - AXI4 Implementations in FPGA Designs

Files Included :

1 Introduction.mp4 (33.4 MB)
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1 Introduction to AXI4 Stream.mp4 (58.72 MB)
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2 AXI4 Stream Slave in VHDL.mp4 (288.73 MB)
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3 AXI4 Stream Slave in Verilog.mp4 (238.6 MB)
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4 AXI4 Stream Master in VHDL.mp4 (283.47 MB)
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5 AXI4 Stream Master in Verilog.mp4 (271.86 MB)
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1 AXI4-Lite Introduction.mp4 (79.4 MB)
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2 AXI4-Lite Slave in VHDL.mp4 (246 MB)
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3 AXI4-Lite Slave in Verilog.mp4 (236.51 MB)
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4 AXI4-Lite Master in VHDL.mp4 (262.74 MB)
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5 AXI4-Lite Master in Verilog.mp4 (254.84 MB)
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1 Full AXI4 Introduction.mp4 (99.61 MB)
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2 AXI4 Slave VHDL.mp4 (428.3 MB)
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3 AXI4 Slave Verilog.mp4 (389.77 MB)
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4 AXI4 Master VHDL.mp4 (434.96 MB)
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5 AXI4 Master Verilog.mp4 (371.01 MB)
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